Bring RISC-V to your course in computer architecture using RVfpga
該研討會將展示如何使用 RISC-V 教授計算機結構和SoC 的設計。 讓您透過了解計算機結構和 RISC-V 指令集方面的專業知識來教授下一代計算機科學、電機和計算機工程領域學生。
This in-person workshop shows you how to use RISC-V to teach computer architecture and the design of systems on chip (SoCs). Give us a day of your time and you will be able to empower the next generation computer science, electrical and computer engineering students to get hands-on expertise in computer architecture and the RISC-V instruction set architecture.
What will you learn?
該研討會展示了如何快速啟動和運行 RISC-V FPGA 系統和 RISC-V 工具。 然後，我們描述了所有 RVfpga 實驗，並展示了如何使用和操作選定的實驗。 我們也將討論如何將 RVfpga 集成到您的課程中。
The workshop shows how to quickly get the RISC-V FPGA system and RISC-V tools up and running. Then, we describe all of the RVfpga labs and show how to use and work through a selection of the labs hands-on. We also discuss how to integrate RVfpga into your curriculum.
Specific topics include:
- 將 SweRV EH1 RISC-V 內核定位到 FPGA
- 分析和修改 RISC-V 核心和內存層次結構
- Installing tools (which can be done before the workshop)
- Targeting the SweRV EH1 RISC-V core and SoC to an FPGA
- Programming the RISC-V SoC
- Adding functionality to the RISC-V SoC
- Analyzing and modifying the RISC-V-core and memory hierarchy
Time: 9am – 5pm, 9th November 2023
Location: UCSC Silicon Valley: University of California, Extension Training Centre, United States