Hello, in Lab05 it is explained how to build the bitstream file for the Nexys A7 board. What would have to be done (e.g. what files would have to be modified) to generate bitstream file that would work on a different board (assumming that the alternative board has at least the same capacity as Nexys A7). Is it a matter of modifying some values in few files of the SweRVolfSoC? Or is it a more complex process? Would ChipsAlliance PlatformIO plugin have to be modified as well in order to use it?
Additionally, during the in-person meeting in London, a Basys3 board version was demonstrated, is it likely to be released soon?
Dear michalmonday,
The connections between the FPGA and the devices are defined in the constraints file. In the RVfpga system for the Nexys A7 board, two constraints files are used:
- Connections with the board devices (LEDs, Switches, 7-Seg Displays, Accelerometer, etc.): RVfpga/src/rvfpganexys.xdc
- Connections with the external DDR2 memory: RVfpga/src/LiteDRAM/liteDRAM.xdc
Each FPGA board uses different connections, thus you will have to modify these files. (Note that constraints files for the different boards can usually be found in the Internet; for example, if you google "xdc file nexys a7 board" you will find the Nexys A7 constraints file.)
At this moment, our RVfpga System can be used in two boards: Nexys A7 (or its predecessor Nexys 4 DDR) and Basys 3 (whose release is planned for Q3/Q4 of 2022). Different RVfpga System implementations are used in each of these two boards due to their different features:
- The RVfpga system on the former board (Nexys A7) uses the external DDR2 memory for RAM (where we store the program to be executed on the processor), for which the system uses the LiteDRAM controller that you can find in our Verilog design. Instead, the RVfpga system on the latter board (Basys 3) uses the 64KB on-chip memory for RAM (as Basys 3 does not have an external DDR2).
- The RVfpga system on the former board (Nexys A7) uses the SweRV EH1 processor from WD, which fits on the 100T FPGA available on this board. Instead the latter board (Basys 3) has a smaller 35T FPGA, thus it must use the simpler and smaller SweRV EL2 processor (the SweRV EH1 processor would not fit in this FPGA).
If you want to use a different FPGA board you'll first have to analyse the features of that board. You may be able to reuse one of our implementations by just changing the constraints file, or you may need to change some other things as we had to do for porting the RVfpga System from the Nexys A7 to the Basys 3. As for the ChipsAlliance PlatformIO plugin, there's no need to modify anything. What other boards would you be interested in? I can take a look at them and give you some hints.
If you have other questions or you need more help with anything, please let us know.
Best regards
Daniel
Thank you very much, I was thinking of using ZYNQ ZC-706 or Basys 3.
As for the ChipsAlliance PlatformIO plugin, there's no need to modify anything.
Does it mean that when creating a new project (for a different board), we can still select the "RVfpga: Digilent Nexys A7" board and all features (like bitstream upload, run/debug a program, collect trace) will still work the same? (as long as the bitstream is generated using modified files)
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