Guide to RISC-V

What’s all this fuss about RISC-V?

MIPS, Arm, ARC…they’re all the same aren’t they?

It’s true that they’re all “Reduced Instruction Set Computers” but, there are three BIG differences:
Firstly, RISC was like smart young people, who as they mature, they “put on weight”.  More instructions get added and, to maintain compatibility, all the old instructions have to remain.

RISC-V has a unique way to solve this problem.

Secondly, RISC-V puts innovation first. It’s open source, you just pick it up and use it. No need to buy a licence at the start.

Later on you may wish to licence a fully verified design along with other relevant “IP” (Intellectual Property”, but this comes later. You bring in Legal when a design is heading towards production!

And thirdly, the concept of RISC-V came out of education. It’s been a frustration for teachers that the “how to make your own” has been a jealously guarded secret amongst the proprietary RISC designs.

This has blighted a generation of Engineers who always wanted to “take the lid off” and see how it worked. With RISC-V you can see inside almost every design available.

The Guide to RISC-V

Imagination use RISC as the firmware processor inside our latest GPUs, and we decided to lead the way in Education to help popularise the teaching of this important technology.

As part of our “IUP” Imagination University Programme we teamed up with Digi-Key to help them create a technology guide, this time focused on RISC-V. It’s short, easy to understand, and hands-on.

Written by Richard J. Sikora, it draws on his 35 years’ experience in embedded systems development!


  • – RISC-VC: its history and unique features
  • – Licencing
  • – Where it may be headed
  • – Early examples of implementations
  • – Hands-on with three implementations:
    1. MPU microprocessor running Linux using the Kendryte CPU on the dev board
    2. MCU microcontroller using the SiFive  on the “Red Board”
    3. And a “soft core” – implementing Western Digital’s “SweRV” EH1 core on an FPGA from Xilinx.

This project is called “RVfpga” and is being rapidly adopted as an under-graduate course in Computer Architecture.

Soon there will be a Masters course in SoC Design.