FoRUmS

problem about how to modify the simulation time of verilator  

 

my123
(@my123)
Eminent Member
Joined: 2 months ago
Posts: 27
18/04/2021 11:54 am  

Hi!

Problem background:

   In the rvfpga teaching material package lab10, it explains how to use the spi module to communicate with the accelerometer and receive data. After learning this part, I tried to use the C language to implement this function, but the output through the uart serial port is all 0xff instead of the received accelerometer value.

problem:

    After unsuccessfully receiving the data, I tried to use the verilator simulator to view the spi module port signal (as described in lab6), but when I used gtk to view the simulation waveform, I found that the simulation time was too short, and the spi module’s clock signal was only Two cycles of change (sim.png), this does not meet my requirements. I tried to modify the timeout value in Lab6_verilator.png as shown in the figure, but unfortunately, I have been looking for a long time and I can’t figure out where to modify the timeout value.


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my123
(@my123)
Eminent Member
Joined: 2 months ago
Posts: 27
18/04/2021 11:55 am  

Lab6_verilator.png


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my123
(@my123)
Eminent Member
Joined: 2 months ago
Posts: 27
18/04/2021 11:56 am  

sim.png


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my123
(@my123)
Eminent Member
Joined: 2 months ago
Posts: 27
18/04/2021 11:57 am  

#if defined(D_NEXYS_A7)
#include <bsp_printf.h>
#include <bsp_mem_map.h>
#include <bsp_version.h>
#else
PRE_COMPILED_MSG("no platform was defined")
#endif
#include <psp_api.h>

#define uart_data (*(volatile unsigned int *)0x80002000)
#define uart_lsr (*(volatile unsigned int *)0x80002014)

#define uart_lsr_r_mask 0x01
#define uart_lsr_w_mask 0x20

#define spcr (*(volatile unsigned int *)0x80001100)
#define spsr (*(volatile unsigned int *)0x80001108)
#define spdr (*(volatile unsigned int *)0x80001110)
#define sper (*(volatile unsigned int *)0x80001118)
#define spcs (*(volatile unsigned int *)0x80001120)

#define spsr_spif (1<<7) //1:移位寄存器传输完成
#define spsr_rfempty (1<<0) //1:读fifo为空
#define spsr_rffull (1<<1) //1:读fifo为满
#define spsr_wfempty (1<<2) //1:写fifo为空
#define spsr_wffull (1<<3) //1:写fifo为满

/**函数声明***/
char uart_getchar(void);
int uart_putchar(char c);

void spiInit(void);
void isTrans(void);
void ADXL_362Init(void);

void spiCSUp(void);
void spiCSDown(void);

char spiGetData(void);
void spiSendData(char c);

 

 

char uart_getchar(void)
{
char c;
while((uart_lsr_r_mask & uart_lsr) == 0);
c = uart_data;
return c;
}

int uart_putchar(char c)
{
/* Check for space in UART FIFO */
while((uart_lsr_w_mask & uart_lsr) == 0);
//write char
uart_data = c;
return 0;
}

void spiInit(void)
{
//spcr = 0x13;
spcr = 0x53;
sper = 0x02;
}

void isTrans(void)
{
while(((spsr&spsr_spif) & (spsr&spsr_wfempty ))== 0);
}

void ADXL_362Init(void)
{
//write register 0x0A
//read register 0x0B
//read fifo 0x0D

spiCSUp();
spiSendData(0x0A);
spiSendData(0x20);
spiSendData(0xFA);
isTrans();
spiCSDown();

spiCSUp();
spiSendData(0x0A);
spiSendData(0x21);
spiSendData(0x00);
isTrans();
spiCSDown();

spiCSUp();
spiSendData(0x0A);
spiSendData(0x23);
spiSendData(0x96);
isTrans();
spiCSDown();

spiCSUp();
spiSendData(0x0A);
spiSendData(0x24);
spiSendData(0x00);
isTrans();
spiCSDown();

spiCSUp();
spiSendData(0x0A);
spiSendData(0x25);
spiSendData(0x1E);
isTrans();
spiCSDown();

spiCSUp();
spiSendData(0x0A);
spiSendData(0x27);
spiSendData(0x3F);
isTrans();
spiCSDown();

spiCSUp();
spiSendData(0x0A);
spiSendData(0x28);
spiSendData(0x0A);
isTrans();
spiCSDown();

spiCSUp();
spiSendData(0x0A);
spiSendData(0x29);
spiSendData(0x80);
isTrans();
spiCSDown();

spiCSUp();
spiSendData(0x0A);
spiSendData(0x2C);
spiSendData(0x13);
isTrans();
spiCSDown();

spiCSUp();
spiSendData(0x0A);
spiSendData(0x2D);
spiSendData(0x0A);
isTrans();
spiCSDown();
}

void spiCSUp(void)
{
spcs = 0xff;
}

void spiCSDown(void)
{
spcs = 0x00;
}

char spiGetData(void)
{
char c;
while(spsr & spsr_rfempty);
c = spdr;

return c;
}

void spiSendData(char c)
{
while(spsr & spsr_wffull);
spdr = c;
}

int main(void)
{
char c = 0x41;

uartInit();
spiInit();
ADXL_362Init();

//写入读取fifo指令
while(1)
{
spiCSUp();
spiSendData(0x0D);
c = spiGetData();
uart_putchar(c);
}

return 0;
}


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dchaver
(@dchaver)
Active Member
Joined: 6 months ago
Posts: 10
18/04/2021 5:51 pm  

Hi @my123,

There is a simple way of controlling the timeout for the simulation: If you execute Verilator in command line, as explained in Appendix A - Section III of the Getting Started Guide, you can easily control the timeout by including the argument +timeout=XXX. See the attached screenshot.

Also, note that the solution for Exercise 1 of Lab 10 is available at RVfpga/Labs/RVfpgaLabsSolutions/Programs_Solutions/Lab10/Accelerometer_7SegDisp. This is what you are trying to do but using Assembly Language instead of C language, so you can use it as a guide for implementing your C program.

Let me know if these instructions are enough for you to solve your problems. If not, we can look for other ways of controlling the timeout or I can take a look at your C program.

Best regards

Dani


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