RVfpga in VHDL ?

@hsunyoto

Dear Harris,

We really appreciate your long term interest in our teaching materials.
 
You're questions:

 
(1) Digital Design & Computer Architecture by Sarah Harris and David Harris.
The RISC-V edition will continue their policy of having examples of both SystemVerilog and VHDL
 

(2) For RVfpga, we could provide the wrappers in VHDL, but the core files would remain in Verilog.
It's a judgement yet to be made: time spent on VHDL wrappers or extra labs...?
Let's see what he feedback is.
(As a general rule, Verilog is usually considered to be the "CPU design language")

Dear Guanyang He,

Thanks for your answer!

Good to know that there are VHDL materials in the upcoming book.

Searching on Internet I've found an open source RISC-V CPU, comparable to SweRV:

    https://www.gaisler.com/index.php/products/processors/noel-v

They have also an example implementation that runs on Xilinx A7-100T:

    https://www.gaisler.com/index.php/products/processors/noel-v-examples/noel-artya7

So if Imagination decides in the future to expand the material to include VHDL (mostly for universities in Europe, I guess), than this NOEL-V can be a candidate.

Kind regards,

Harris

It is an essential part of our teaching materials, that we choose real-world IN-SILICON designs.
SweRV is in production with several companies, and its commercial eco-system is growing. This is very important to the long-term credibility of the suite of materials that we are building.
There are many other Open-Source cores like NOEL-V, but only a vital few have the pedigree that getting into silicon requires.

Dear Mr. Owen,

I've found several RISC-V CPUs/cores implemented in VHDL on:

    https://riscv.org/ staging-cores-list-cores/

Most of them, like you said, are FPGA-based / soft-core CPUs. What sets this NOEL-V apart is this CPU is developed by a company, Cobham Gaisler, that has developed CPU/IPs, such as LEON (SPARC):

     https://en.wikipedia.org/wiki/LEON

for used in the outer space for ESA. So this NOEL-V (I assume) not a "hobbyist" CPU core, but something that will make (or already, has made) its way to silicon.

Of course SweRV is more for high-volume production. NOEL-V (like LEON) will be low-volume production. But don't forget, a CPU that ends up in a satellite or space probe needs to function for quite a long time (last I've heard, Voyager 1 launched in 1977, still communicating with the ground station until now). Don't forget as well the challenge of a CPU that has to function in outer space, hazardous environment, that needs to tolerate radiation.

I am not in any way related with the company behind NOEL-V (and LEON). It looks to me like a good candidate for VHDL implementation of a RISC-V for RVfpga, in case Imagination would expand it that way. My concern is more immediate: how to acquire RISC-V material in VHDL. Because my university (like many other universities in Europe) would not be changing VHDL to (System)Verilog for digital design courses in short future.

RVfpga materials only in Verilog has some limited use for undergraduate studies in electrical engineering at many European universities. This is the message I am trying to convey to Imagination University Programme. This is a good initiative, and I want it to be successful all over the world, also in Europe.

Kind regards,

Harris