[Sticky] RVfpga v2.0 released today!  


Member Admin
Joined: 7 months ago
Posts: 6
06/12/2021 2:25 pm  

We’ve just released RVfpga 2.0!

This version extends the existing materials (the Getting Started Guide and Labs 0-10) by adding Labs 11-20, creating enough materials to support two semesters of teaching.

 Labs 11-20 focus on microarchitecture and memory hierarchy., and they explore the SweRV EH1 RISC-V pipeline and use or add features to the RISC-V core, including:

*Using and adding performance counters

*Analysing basic instructions (arithmetic-logic, memory, branch) and adding new ones

*Analysing how structural, data and control hazards are handled

*Using the branch predictors

*Enabling the scratchpad memories (DCCM and ICCM)

*Using testbenches to measure performance, and exploring various memory features.


Translation into Simplified Chinese will start shortly for release early in 2022.

We would also like to highlight that the complementary RVfpga-SoC course, released in June 2021, is now available in 5 languages.


我们刚刚发布了RVfpga 2.0版本!


实验室11-20侧重于微架构和内存层次,它们探索了SweRV EH1 RISC-V流水线,并使用或增加了RISC-V内核的功能,包括: *使用和增加性能计数器。



附件为RISC-V峰会(2021年12月6日至8日)准备的RVfpga手册。Imagination Technologies的展位是B12。

RCWO liked