Dear Teachers and Developers:
We've received a question that we found might be useful to some of IUP members.
I find IUP while looking for training related to verilator simulator.
I mainly use Xilinx FPGA.
Recently, I was thinking about replacing the simulator from Xsim to VCS, and I got to know verilator.
1) I am wondering if it is possible to replace Xsim with VCS.
2) If so, do you have any suggestion on learning Verilator?
1) I am wondering if it is possible to replace Xsim with VCS.
In the past, I worked with XSim and ModelSim. I have never used VCS.
I know Verilator since we started with RVfpga, and from my point of view it is the best Verilog simulator that I've used, especially if you work with Linux.
2) If so, do you have any suggestion on learning Verilator?
Although I'm not an expert, what I've learned about Verilator comes from:
- Their webpage, https://www.veripool.org/verilator/ [veripool.org], which contains lots of documentation and examples.
- The use in real projects such as SweRVolf ( https://github.com/chipsalliance/Cores-SweRVolf ) and RVfpga ( https://university.imgtec.com/rvfpga/ ). In RVfpga's GSG you can find installation instructions for Linux, Windows and MacOS, and you can find instructions on the use of Verilator with RVfpga in the GSG and in several labs (such as Lab 6 or Lab 7).
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