如何将新的外设挂载到总线上以及bsp、psp包的使用 How to mount a new peripheral to the bus and the use of bsp and psp packages

映射地址.png

mapped_address.png

MATCH_ADDR & MASK.png

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uart_demo.png

@my123

Q1:
Please read carefully Lab 6 - Section 6.A, which explains the low level implementation of the GPIO module, which can serve you as a guide for including any other I/O controller in RVfpga.

You can follow the next steps and modify the following modules/files:

1) Instantiate the new controller in module swervolf_core (implemented at file swervolf_core.sv [swervolf_core.sv]). You can see how this is done for the GPIO in section 6.A.ii of Lab 6. The new module has a set of signals which must be connected with the board (for the GPIO, these are the signals shown in Table 4 of Lab 6), and another set of signals which must be connected with the Wishbone Bus (for the GPIO, these are the signals shown in Table 3 of Lab 6).

2) Connect the new controller with the board. You can see how this is done for the GPIO in section 6.A.i of Lab 6, where the LEDs and the Switches are connected with the signals of the GPIO module shown in Table 4 through tri-state buffers. You have to modify the Constraints File (rvfpga.xdc), and also modules rvpfga (implemented at file rvfpga.sv [rvfpga.sv]) and swervolf_core (which must include the new inputs/outputs to the module).

3) Connect the new controller with the SweRV EH1 core. You can see how this is done for the GPIO in section 6.A.iii of Lab 6, where the signals of the GPIO module shown in Table 3 are connected with the SweRV EH1 core through the Wishbone Bus. You have to modify file wb_intercon.vh and module wb_intercon (implemented at file wb_intercon.v).
In this module (wb_intercon), you assign memory addresses to the new controller. You can use, for example, the addresses starting at 0x80001800, which are free in RVfpga. For that purpose:
- Change num_slaves to 8.
- Add one new component to MATCH_ADDR: 32'h00001800
- Add one new component to MATCH_MASK: 32'hffffffc0
- Include the set of wishbone signals for the i2c controller. You can see how this is done for the GPIO signals from Table 3.

It can also be a good help for you to compare the Verilog code of the original RVfpga (available at: RVfpga/src) and the Extended RVfpga after completing all the exercises (available at: RVfpga/Labs/RVfpgaLabsSolutions/RVfpga_Solutions/src), where several new controllers have been added.
Note that document RVfpga/Labs/RVfpgaLabsSolutions/RVfpga_Solutions/src/RVfpgaModifications.pdf, which explains the modifications performed in each exercise, can also be a good help.

Let me finally say that the I2C Temperature Sensor may be a complex device to start with. I would recommend you to start with a simpler one and then try I2C.

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Q2:
The BSP and PSP packages provide some library functions to use with RVfpga on the Nexys A7 board. The example that you are mentioning illustrates how to use some of them.

- You first have to include the header files for the BSP and PSP, which contain the functions declarations, as shown in the example. The header files that you have to include are the following:
~/.platformio/packages/framework-wd-riscv-sdk/board/nexys_a7_eh1/bsp/bsp_printf.h
~/.platformio/packages/framework-wd-riscv-sdk/board/nexys_a7_eh1/bsp/bsp_mem_map.h
~/.platformio/packages/framework-wd-riscv-sdk/board/nexys_a7_eh1/bsp/bsp_version.h
~/.platformio/packages/framework-wd-riscv-sdk/psp/api_inc/psp_api.h

- Then you can use the functions provided by the packages by simply invoking them with the proper parameters. In this example, we use uartInit, which you can find at: ~/.platformio/packages/framework-wd-riscv-sdk/board/nexys_a7_eh1/bsp/bsp_printf.c, and printfNexys, which you can find at ~/.platformio/packages/framework-wd-riscv-sdk/board/nexys_a7_eh1/bsp/bsp_printf.c.

- You can also inspect other functions from the PSP/BSP, such as the functions that we use at Lab 9 for handling interrupts. The examples from that lab also show how to use these functions.

Best regards
Dani

以下中文翻译仅供参考

Q1:
请仔细阅读Lab 6 - 第6.A节，其中解释了GPIO模块的低级实现，这可以作为你在RVfpga中包含任何其他I/O控制器的指南。

您可以按照接下来的步骤，修改以下模块/文件。

1）在模块swervolf_core（在文件swervolf_core.sv中实现）中实例化新的控制器。你可以在实验室6.A.ii节中看到GPIO是如何实现的。新模块有一组信号必须与电路板连接（对于GPIO，这些是实验6的表4中所示的信号），还有一组信号必须与Wishbone总线连接（对于GPIO，这些是实验6的表3中所示的信号）。

2）将新的控制器与电路板连接起来。您可以在实验6的6.A.i节中看到如何对GPIO进行连接，其中LED和开关通过三态缓冲器与表4中所示的GPIO模块的信号进行连接。你必须修改约束文件(rvfpga.xdc)，还要修改模块rvpfga(在文件rvfpga.sv中实现)和swervolf_core(必须包括模块的新输入/输出)。

3）将新的控制器与SweRV EH1内核连接。你可以在实验6的6.A.iii节中看到GPIO是如何完成的，表3中所示的GPIO模块的信号是通过Wishbone总线与SweRV EH1核连接的。你必须修改文件wb_intercon.vh和模块wb_intercon（在文件wb_intercon.v中实现）。
在这个模块(wb_intercon)中，您可以为新的控制器分配内存地址。例如，你可以使用从0x80001800开始的地址，这些地址在RVfpga中是空闲的。为了达到这个目的。
- 将num_slaves改为8
- 在MATCH_ADDR中添加一个新的组件：32'h00001800。
- 在MATCH_MASK中增加一个新的组件：32'hffffffc0。
- 包括i2c控制器的一字形信号集。你可以从表3中看到GPIO信号是如何完成的。

比较原始RVfpga的Verilog代码(可在：RVfpga/src)和完成所有练习后的Extended RVfpga(可在：RVfpga/LabsSolutions/RVfpga_Solutions/src目录下找到)，其中增加了几个新的控制器，这对你也是一个很好的帮助。
请注意，文件RVfpga/LabsSolutions/RVfpga_Solutions/src/RVfpgaModifications.pdf，它解释了在每个练习中进行的修改，也可以提供很好的帮助。

最后我要说的是，I2C温度传感器可能是一个复杂的器件，要开始使用。我建议你从一个比较简单的开始，然后再尝试I2C。

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Q2:
BSP和PSP软件包提供了一些库函数，供Nexys A7板上的RVfpga使用。你提到的例子说明了如何使用其中的一些函数。

- 首先你必须包含BSP和PSP的头文件，其中包含函数声明，如例所示。你必须包含的头文件如下。
~/.platformio/packages/framework-wd-riscv-sdk/board/nexys_a7_eh1/bsp/bsp_printf.h。
~/.platformio/packages/framework-wd-riscv-sdk/board/nexys_a7_eh1/bsp/bsp_mem_map.h
~/.platformio/packages/framework-wd-riscv-sdk/board/nexys_a7_eh1/bsp/bsp_version.h
~/.platformio/packages/framework-wd-riscv-sdk/psp/api_inc/psp_api.h。

- 然后，你可以通过简单地调用包提供的函数，并提供适当的参数。在这个例子中，我们使用uartInit，你可以在以下地址找到它。~/.platformio/packages/framework-wd-riscv-sdk/board/nexys_a7_eh1/bsp/bsp_printf.c和printfNexys，你可以在~/.platformio/packages/framework-wd-riscv-sdk/board/nexys_a7_eh1/bsp/bsp_printf.c找到。

- 你也可以检查PSP/BSP的其他函数，比如我们在实验9中用来处理中断的函数。该实验室的例子也展示了如何使用这些函数。

希望能帮到你
Daniel